Computer Architecture and Operating System

Central Processing Unit (CPU)

Central Processing Unit (CPU) is the brain of a computer to execute instructions and perform arithmetic operations on Instruction Set Architecture (ISA) like ARM (Mobile), x86 (Traditional Desktop), RISC-V (Open Source). Each ISA has its own assembly language.

CPU Performance

Single-Core Performance = Clock Speed x IPC (Instruction Per Cycle)

Most everyday applications rely heavily on one or two fast cores. Multiple cores helps for multitask and parallel computation. It depends on the software whether it is coded scalable or not. Some language have auto-parallelizing feature but it's rare for complex desktop app. The OS will schedule threads to the cores.

Amdahl's Law, Speedup = $\frac{1}{(1 - P) + \frac{P}{N}}$ where P is the fraction of time spent on parallelizable code and N is the number of cores.

Windows Task Manager Metric

Types of Chips

Bus

Internal Bus by Motherboard

CPU will have dedicated wires to GPU, RAM and chipset (peripherals) which looks like a star-topology where CPU is the center. Inside of the CPU, it has a ring or mesh topology to connect all the cores and cache.

Protocols

• PCIe (Peripheral Component Interconnect Express) is the interface standard for connecting internal computer components. Usually connect to GPU and primary SSD.
• DDR (Double Data Rate) tick on both edges of the clock. Used on RAM.
• DMI (Direct Media Interface) is the interface standard for connecting chipset and secondary storage (SATA / HDD / Extra SSD) all connected to this highway.
• NVMe (Non-Volatile Memory Express) is a type of flash memory and can handle parallel commands. THis fix the SATA problem. It lies on M.2 slot on the motherboard that is direct to CPU.
• SATA protocol, which was designed for slow, spinning mechanical hard drives which is sequential access.

Bandwidth

External Bus by Motherboard

Protocols

Embedded System Buses

Memory

Memory is a volatile, temporary quick storage managed by memory management. Usually it's called RAM(Random Access Memory). A paging/virtual memory maps shorter virtual memory address to physical memory address.

• GPU Overflow: Share some RAM with GPU
• RAM Overflow: Swap(borrow) to disk
• RAM as Buffer: Cache files from storage. When RAM is full, the kernel can clean the cache files to free up memory

RAM Types

• DRAM (Dynamic Random Access Memory): have its own chip to map physical address to RAM's actual logic gate address to deal broken circuit and evenly distribute the use of gates to increate durability
• PMIC (Power Management Integrated Circuit): Modern RAM manage power supply by its own by demand
• Peak speed of the RAM can increase 20~50% of its typical speed
• Frequency of RAM is measured in MT/s (Megatransfer per second)

Storage

SSD, HDD is a storage. Read Only Memory (ROM) is used for storing instructions. It was slow but non-volatile. Mask ROM can't be overwritten while flash ROM can.

Cache

• L1: Closest to core, fastest, smallest (~32KB)
• L2: Shared per core or pair (~256KB-1MB)
• L3: Shared across all cores (~2MB-64MB)

Firmware & Boot Process

Firmware is the permanent software programmed into a hardware device's read-only memory. It is usually written in C/C++ or assembly language and compiled to binary machine code based on the chip specification. It provides the necessary instructions for how the device communicates with other hardware. Bootloader is a tiny program responsible for loading the main firmware/OS. GRUB, U-Boot, Windows Boot Manager are examples.

The PC Boot Sequence

Embedded System Boot

Unlike PCs, embedded systems are often "static"—the hardware doesn't change, so the kernel doesn't need to "discover" it.

• The Device Tree (.dtb): Instead of ACPI, embedded systems use a Device Tree. This is a file that tells the kernel: "The GPIO controller is exactly at address 0x3F200000."
• Example (Raspberry Pi):
  1. GPU Boots First: On the Pi, the GPU actually wakes up before the ARM CPU!
  2. Firmware Loading: The GPU loads bootcode.bin from ROM and start.elf from the SD card, which then wakes up the CPU.
  3. Kernel Execution: CPU starts the Linux kernel with the provided Device Tree.

Low-Level Development

Development Tools

Analysis Tools

Some CPU have a trace unit that records every instruction executed. Debugger use symbol + memory maps to remember the address of a memory location. CPU execution is abstract using symbol tables and IDE/GDB integration.

Real Time Operating System (RTOS)

An OS kernel designed for embedded systems that need predictable timing and task scheduling.

Operating System

The manager of computer resources and processes.

OS Mechanism

• IPC (Inter-Process Communication): message queues, shared memory, socket, signal, semaphore, event flags.
• Race Conditions: If two threads try to change the same piece of data at the same exact time, the data can become corrupted.
• Deadlocks: Thread A is waiting for Thread B to finish, but Thread B is waiting for Thread A. They both get stuck forever.
• Starvation: A thread is never given a chance to run.
• Mutex: a lock so only one thread can own it. Used to protect shared resources. A thread can spinlock to acquire lock repeateadly.
• Semaphore: a counter that allow N threads to pass or wait.
• ISR(Interrupt Service Routine): Signal kernel to run an interrupt. Interrupt vector table maps an interrupt trigger to a handler function which tells what to do.

POSIX (Portable Operating System Interface)

A standard kenel call API for UNIX-like OS. It's implemented on UNIX, Linux, macOS but not Windows. Nowdays, developers use standard C/C++ libraries to implement POSIX for cross-platform. In POSIX, everything is a file; In windows everything is an object handle.

File System